This invention relates to analyzing electrical circuit boards, e.g., to identify an integrated circuit which has failed.
In testing circuit boards it is desirable to be able to identify individual elements which have failed without having to disconnect the elements from the circuit. Circuit faults can be detected by voltage and waveform measurements, but when several elements are connected to a point it is difficult to identify, e.g., which element has short circuited to ground. Current tracing and measurement methods may locate the failed element but generally require successive measurements to be made at various points between elements, which can be difficult when conductive paths between the elements are short.
In three U.S. patent applications, each entitled "Analyzing Electrical Circuit Boards", recently filed, respectively, by Richard P. Davis, Ser. No. 879,881, filed Feb. 21, 1978; Alexander Pitegoff, Ser. No. 880,056, filed Feb. 22, 1978; and Joseph Wrinn and Mark Hoffman, Ser. No. 880,589, filed Feb. 23, 1978 (all hereby incorporated by reference), there is disclosed, inter alia, Wrinn's and Hoffman's joint invention of using a probe with three equally spaced tips to contact an IC lead at the node of a circuit board, to determine the total parallel resistance R.sub.t of the ICs on the node, the ratio of the internal resistance R.sub.1 of the IC on the lead to the parallel resistance R.sub.2 of the remaining ICs on the node, and the absolute values of R.sub.1 and R.sub.2 individually, for the purpose of analyzing faults on the node by, in general, comparing measured resistances to standards.